
This directory contains three sideband signalling tests:

gmake -f Make_tl1_sync_sideband.gcc
This is a basic test of sideband functionality. The 
Master sets the MFlags signal and the Slave reads 
the signal every clock cycle.

gmake -f Make_tl1_sync_sideband2.gcc
In this model, the Slave uses a triggered SC_METHOD
to monitor the MFlags. When the MFlags signal changes,
the Slave receives the event and reads the new value
of the MFlags sideband signal.

gmake -f Make_tl1_sync_sideband3.gcc
This is a more complex model that tests the events
associated with two way communication of the Control
sideband signal. The System Master tries to set the 
Control signal to a new value, but it must wait if 
the Core Slave has set ControlBusy to true. Once
ControlBusy is false, the Master sets Control to a
new value. The Core Slave sees this new value and
then waits for the ControlWr signal to go high 
indicating that the signal is ready to read. The
Core Slave then reads the new Control values.

Please send comments & suggestions to:
Alan Kamas, aok@sonicsinc.com, www.kamas.com
